| Revista: | Journal of applied research and technology |
| Base de datos: | PERIÓDICA |
| Número de sistema: | 000399645 |
| ISSN: | 1665-6423 |
| Autors: | Vargas Calderón, E1 Sandoval Ibarra, F2 Montoya Suárez, E2 Corona Murguía, O2 |
| Institucions: | 1Intel-Tecnología de México S.A. de C.V., Tlaquepaque, Jalisco. México 2Instituto Politécnico Nacional, Centro de Investigación y de Estudios Avanzados, Guadalajara, Jalisco. México |
| Any: | 2007 |
| Període: | Abr |
| Volum: | 5 |
| Número: | 1 |
| Paginació: | 49-56 |
| País: | México |
| Idioma: | Inglés |
| Tipo de documento: | Artículo |
| Enfoque: | Aplicado, descriptivo |
| Resumen en inglés | Since portable systems and processing power applications demand efficient power consumption, this paper deals with the development of an analytical model based on the on-resistance effect of MOS switches to design a silicon-based char-pump voltage generator (VG). This model that is developed for adding design parameters under the designer's control is a useful design tool to quickly estimate the VG's performance in the time domain. Numerical results are compared with transistor-level simulation to validate not only the analytical model, but also to estimate the integration area of a silicon-based VG. It was found that an on-resistance ranging from zero to 50 Ω presents a relative error of 2%. Experimental results show the usefulness of the proposed design model |
| Disciplines | Ingeniería |
| Paraules clau: | Ingeniería electrónica, Teoría de circuitos, Electrónica de potencia, Diseño de circuitos |
| Keyword: | Engineering, Electronic engineering, Circuits theory, Power electronics, Circuit design |
| Text complet: | Texto completo (Ver HTML) |
